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Computer Architecture and Digital Systems


Credits: 12

Objectives: The course aims to understand the high-performance and energy-efficient computer architecture, as a basis for informed software performance engineering and as a foundation for advanced work in computer architecture, compiler design, operating systems and parallel processing. Further objectives are to enable students to master digital integrated circuit design trade-offs. Experience state-of-the-art electronic design automation tools and high-level design methodologies for FPGA and semi-custom technologies. Understand sensor based electronic systems including sensor conditioning and sensor data fusion.

Description: Topics include: 

  • Pipelined CPU architecture. Register renaming. Software instruction scheduling and software pipelining. Superscalar and long-instruction-word architectures. Branch prediction and speculative execution. Simultaneous multithreading, and vector computer. 
  • Caches: associativity, allocation and replacement policies, sub-block placement. Multilevel caches, multilevel inclusion. Cache performance issues. Uniprocessor cache coherency issues: self-modifying code, peripherals, address translation. 
  • Dependence in loop-based programs; dependence analysis, and iteration-space transformations - to enable automatic parallelisation, vectorisation (eg for SSE), and for memory hierarchy optimisations such as tiling. 
  • Implementations of shared memory: the cache coherency problem. Update vs invalidation. The bus-based 'snooping' protocol design space. 
  • Scalable shared memory using directory-based cache coherency. How shared memory supports programmability. 
  • Multicore architectures: Multicore e multiprocessor organization; single instruction multiple thread. Decoupling, latency tolerance, throughput-intensive memory system architecture. 
  • Fundamental Design metrics in digital integrated circuits design. Design space exploration, in terms of area, speed, power consumption, reliability and flexibility addressing the exponential growth in complexity and performance (Moore’s law). 
  • Design methodologies for full-custom and semi-custom digital integrated circuits including Field Programmable Gate Arrays (FPGA), Gate Arrays and Standard-Cells. High-level electronic design automation (EDA) tools for hardware-software co-design. Hardware description languages (SystemC, VHDL and Verilog) modeling, simulation and logic synthesis. 
  • CMOS device and interconnect modeling, static and dynamic logic families, latch and flop design, ALU and MAC design, power supply and clock distribution, signal integrity, and I/O design. 
  • Power Consumption in CMOS digital integrated circuits. Design techniques for the reduction of power consumption at different level of abstractions: logic design, clock gating, multi-VDD, multi-VT, dynamic frequency scaling, dynamic voltage scaling, dynamic thermal management. 
  • Sensors definition, classification and characterization, with focus on temperature, magnetic and inertial MEMS sensors. Sensor compensation and calibration techniques. Sensor readout electronics and sensor data fusion.

Assessment: Oral exam and practical projects.

Prerequisites: None

Modules: 2

Module 1 (6 Credits): Computer Architecture

Module 2 (6 Credits): Digital Systems Design

 

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